摘要
采用普通陶瓷工艺制备了Zn2SiO4掺杂的氧化锌压敏电阻,研究了Zn2SiO4掺杂量对氧化锌压敏电阻的致密度,晶粒微观结构,小电流性能和通流能力的影响。结果表明:当Zn2SiO4掺杂量达到0.75%(摩尔分数)时,氧化锌压敏电阻晶粒致密均匀;电学性能得到改善,压敏电压梯度和非线性系数分别高达438 V/mm和85,漏电流为0.15μA,样品在耐受5 kA电流下的8/20μs脉冲电流波后,残压比和压敏电压变化率分别为2.0和4.0%。
Zinc oxide varistors doped with Zn2SiO4 were prepared by conventional ceramic technology. The effects of Zn2SiO4 doping amount on the density, grain microstructure, low current properties and surge absorption capability of zinc oxide varistors were studied. The results indicate that when the Zn2SiO4 doping amount is 0.75% （mole fraction）, zinc oxide varistor with dense and uniform grain structure is obtained; the electrical properties of zinc oxide varistors are also improved, breakdown volaage gradient and nonlinear coefficient are 438 V/mm and 85 respectively, leakage current is 0.15 μA, and after 5 kA current with 8/20 μS wave surge current impulse, the residual voltage ratio and breakdown voltage variation are 2.0 and 4.0%.
出处
《电子元件与材料》
CAS
CSCD
北大核心
2011年第9期24-26,35,共4页
Electronic Components And Materials
基金
科技型中小企业技术创新基金资助项目(No.09C26214201910)
