摘要
介绍了一种在工程爆破振动数据采集中应用的控制器设计方案。系统采用Altera公司的FPGA作为主控制器芯片,其中集成控制逻辑单元与NiosⅡ软核嵌入式处理器二者结合成为单芯片控制器方案。控制器运用多路FIFO进行数据缓冲,顺序传输数据至外部存储器,实现了多路数据的同步采集。单芯片处理器电路结构设计简单可靠,系统采集了同步的振动数据,在实际工程的振动分析、监测应用中取得了较好的效果。
An embedded system controller is provided for blast vibration data acquisition. Altera FPGA is used for main controller, in which the logic unit and the NiosII core are embedded in the FPGA as a single chip scheme. The FIFO memories are used as the buffer for parallel data, and then the data is transported to SDRAM. The single chip design is simple and reliable. The acquired synchronous data support blast vibration analysis and monitoring.
出处
《单片机与嵌入式系统应用》
2011年第9期22-24,共3页
Microcontrollers & Embedded Systems