基于FPGA的罗兰C前端IIR数字带通滤波器设计

Design of LoranC IIR digital bandpass filter based on FPGA

针对罗兰C前端带通滤波的需求,提出了采用级联形式在FPGA上实现罗兰C数字带通滤波器的方法。首先利用Matlab设计出满足要求的滤波器,考虑硬件设计要求将参数进行取整,并对取整前后的滤波效果进行了比对分析。在硬件程序设计前在Matlab下用级联式差分方程模拟硬件滤波算法,以提高设计的成功率。最后在FPGA下用Verilog编程实现硬件滤波器,并用实际采集的罗兰-C信号对滤波器进行了测试,测试效果显示良好。

A cascade method based on FPGA is proposed in this paper to meet the demand of the digital bandpass filter in Loran-C receiver.Firstly,the filter is designed to meet the requirments in the Matlab environment.The filter parameters are rounded to meet the hardware design requirement and the performance is compared with the previous.Then the difference equation is used in simulating the hardware process which can improve the possibility of success.Finally,the filter is realized by Verilog hardware description language program and is tested by practical Loran C data,it performs well.