一种新型2-D卷积器的FPGA实现

A Novel FPGA-Based 2-D Convolver

提出了一种基于FPGA实现的新型2-D卷积器结构.该结构占用硬件资源少,外部带宽只需1pixels/clock.与传统的卷积器相比,不仅资源耗用减少95%以上,并且可以依据系统实时性要求调整吞吐率,带来了系统设计的灵活性.在Altera EP4SGX230KF40FPGA上实现结果表明,对于5×5大小的图像卷积,达到90Mpixels/s的吞吐率,满足大多数图像处理系统的实时性要求.

This paper presents a novel 2-D convolver targeted at field programmable gate array（FPGA）.The design features its low external memory bandwidth of 1 pixels/clock,and consumes comparatively little on-chip resources,reducing 95% of that compared with traditional convolvers.Also,it brings flexibility to system design by configurable throughput rate based on the real-time requirements.When implemented on Altera EP4SGX230KF40 FPGA,the throughput rate could reach up to 90 Mpixels/s for 5×5 image convolution,and it could satisfy most real-time image processing applications.