摘要
RapidIO控制器在添加循环冗余码(CRC)时存在电路面积大、功耗高的问题。为此,设计一种4个CRC16生成器并行执行的CRC模块。对该模块进行功耗评估,结果表明,与原结构相比,该模块能提前1个时钟周期输出校验值,逻辑门数减少10.8%,面积减少18.9%,功耗降低25.3%。
For the problems that the RapidlO controller with many Cyclic Redundancy Code(CRC) will increase the area and power, this paper designs a new CRC module with four CRCI6 generators, which work at the same time. The new CRC module can output the check code ahead of the previous work for one cycle. Results of power evaluation show that compared with the previous work, the number of logical gates, the area, and the power of this design are respectively decreased by 10.8%, 18.9%, and 25.3%.
出处
《计算机工程》
CAS
CSCD
北大核心
2011年第15期238-239,242,共3页
Computer Engineering