期刊文献+

RapidIO控制器的CRC模块设计 被引量:2

CRC Module Design of RapidIO Controller
下载PDF
导出
摘要 RapidIO控制器在添加循环冗余码(CRC)时存在电路面积大、功耗高的问题。为此,设计一种4个CRC16生成器并行执行的CRC模块。对该模块进行功耗评估,结果表明,与原结构相比,该模块能提前1个时钟周期输出校验值,逻辑门数减少10.8%,面积减少18.9%,功耗降低25.3%。 For the problems that the RapidlO controller with many Cyclic Redundancy Code(CRC) will increase the area and power, this paper designs a new CRC module with four CRCI6 generators, which work at the same time. The new CRC module can output the check code ahead of the previous work for one cycle. Results of power evaluation show that compared with the previous work, the number of logical gates, the area, and the power of this design are respectively decreased by 10.8%, 18.9%, and 25.3%.
出处 《计算机工程》 CAS CSCD 北大核心 2011年第15期238-239,242,共3页 Computer Engineering
关键词 RapidIO控制器 循环冗余码 CRC生成器 嵌入式系统 RapidlO controller Cyclic Redundancy Code(CRC) CRC generator embedded system
  • 相关文献

参考文献4

  • 1聂新义,孙柯柯,马克杰.PCI转RapidIO桥的设计与实现[J].计算机工程,2010,36(3):246-248. 被引量:7
  • 2Fuller S. RapidIO嵌入式系统互连[M].王勇,译.北京:电子工业出版社,2006.
  • 3RapidIO Trade Association. RapidIO Interconnect Specification Rev1.3 Part 6: 1x/4x LP-Serial Physical Layer Specifica- tion[EB/OL]. (2005-01-01). http://www.RapidIO.org.
  • 4Roginsky A L, Christensen K J, Polge S. Efficient Computation of Packet CRC from Partial CRCs with Application to the Cells-in-frames Protocol[J]. Computer Communication, 1998, 21(6): 654-661.

二级参考文献6

  • 1Fuller S.RapidIO嵌入式系统互连[M].王勇,译.北京:电子工业出版社,2006-06.
  • 2RapidIO Trade Association. RapidlO Interconnect Spcification(Rev. 1.3)[Z]. 2005.
  • 3Hennessy J L, David A. Patterson Computer Architecture: A Quantitative Approach[M]. [S. l.]: Elsevier Science, 2003.
  • 4PCI Special Interest Group. PCI Local Bus Specification(Rev. 2.2)[Z]. 1998.
  • 5Jennie Ltd.. SRIOPCI Bridge Datasheet(V1.4)[Z]. 2006.
  • 6章乐,李雅静,倪明,柴小雨.一种基于RapidIO接口的嵌入式系统[J].计算机工程,2008,34(B09):1-3. 被引量:6

共引文献7

同被引文献11

  • 1俞迅.32位CRC校验码的并行算法及硬件实现[J].信息技术,2007,31(4):71-74. 被引量:11
  • 2Tanenbaum A S. Computer Networks(4th Edition) [M]. Prentice Hall, 2003 : 192-200.
  • 3斯廷森.密码学原理与实践(第三版)[M].冯登国,等译.北京:电子工业出版社,2009.
  • 4Williams R N. A PAINLESS GUIDE TO CRC ERROR DETECTION ALGORITHMS [EB/OL]. http://www. ross. net/ crc/download/crc_v3. txt, 2010-04.
  • 5Campobello G, Patane G, Russo M. Parallel CRC realization [J]. IEEE Transactions on Computers, 2003,52(10) : 1312.
  • 6Peterson W W, Brown D T. Cyclic Codes for Error Detection [J]. Proceedings of the IRE, 1961,49(1):228-235.
  • 7Wikimedia Foundation, Inc. Linear feedback shift register [EB/ OL]. http://en. wikipedia. org/wiki/Linear_ feedback_ shift_ register, 2011-06-30.
  • 8Shieh M D,Sheu M H,Chen C H H. A Systematic Approach for Parallel CRC Computations [J]. Journal of Information Science and Engineering, 2001,17 : 445-461.
  • 9毕占坤,张羿猛,黄芝平,王跃科.基于逻辑设计的高速CRC并行算法研究及其FPGA实现[J].仪器仪表学报,2007,28(12):2244-2249. 被引量:17
  • 10阳璞琼,何怡刚,谭阳红,邓晓,侯周国,代扬,肖迎群.超高频RFID系统CRC电路设计[J].电路与系统学报,2009,14(2):18-21. 被引量:10

引证文献2

二级引证文献10

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部