一种适用于可配置(GSM/TD-SCDMA/WCDMA)发射机中的数模转换器和滤波器模块(英文)

A Multi-Mode DAC and Filter Block For Reconfigurable (GSM/TD-SCDMA/WCDMA) Transmitters

提出了一种应用于多标准无线发射机中的双通道基带模块,每个通道由一个10位电流驱动型数模转换器(DAC)和一个可重构的四阶巴特沃斯型低通滤波器级联构成.该模块能够适用于GSM,TD-SCDMA,以及WCDMA共3种标准的无线发射机.在这3种标准下,DAC的工作频率以及滤波器的截止频率分别为16 MHz/250 kHz,64 MHz/2 MHz,100 MHz/6 MHz.在SMIC 0.13-μm CMOS工艺下模块的核心面积为0.55 mm2,电源电压1.2 V,单通道功耗小于5.5 mW.后仿结果显示,在GSM,TD-SCDMA,WCDMA3种标准下无杂散动态范围(SFDR)分别为77,67,60 dB,信噪失真比(SNDR)分别为74,64,58 dB.

A dual-channel baseband block adopted in a multi-standard wireless transmitter is presented;each channel consists of a 10-bit current-steering digital-to-analog converter（DAC） and a 4th-order Butterworth low-pass reconstruction filter.The proposed block meets the specifications of GSM,TD-SCDMA and WCDMA by digitally adjusting the DAC conversion frequency and the low-pass filter cut-off frequency.For the GSM case,the DAC operating frequency and the filter cut-off bandwidth are set to 16 MHz and 250 kHz respectively;for the TD-SCDMA case,they are set to 64 MHz and 2 MHz,and for the WCDMA case,they are set to 100 MHz and 6 MHz.The proposed block is realized in SMIC 0.13-μm CMOS technology and occupies 0.55 mm2 die area.It operates with a single 1.2-V supply;the power consumption of one-channel is less than 5.5 mW for all the concerned standards.The post simulation shows that,the spurious-free-dynamic-range（SFDR） and the signal-to-noise-and-distortion-ratio（SNDR） are 77 dB and 74 dB for GSM,67 dB and 64 dB for TD-SCDMA,60 dB and 58 dB for WCDMA,respectively.