基于FPGA的数字锁相环设计

Disign and Implementation of Digital PLL Based on FPGA

数字锁相环是闭环自动控制系统,常用于接受信号的载波恢复与跟踪。文章介绍了一种二阶数字锁相环的基本原理和其基于FPGA的实现方案,详细阐述了鉴相器、环路滤波器和数控振荡器等环路部件的参数设计及电路结构,并引入一种有效的环路状态检测方法,仿真验证了设计的正确性和有效性。

Digital PLL is widely used in carrier recovery and tracking as closed-loop automatic control system.The implementation scheme of a kind of two-order digital PLL based on FPGA are introduced in this paper,for which the circuit structures and parameters of phase detector.Loop filter and numerical controlled oscillator are given in detail,and also a novel loop state indicator is proposed.Through simulation the validity of this implementation scheme is proved.