摘要
文章对DES加密算法进行了详细的分析,给出了采用VHDL描述基于FPGA实现DES加密算法系统的设计过程和仿真结果。该算法在密钥生成、S盒的处理中采用了并行处理的方式,克服了传统DES流水线实现方式的缺点,进一步提高了系统的处理速度。
The paper analysis the base principle of DES algorithm.It provided the implementation of DES based on FPGA with VHDL, and the simulation results.The parallel method is utilized in sub-key calculation and S-box process to improve the traditional DES pipelining design and data processing speed.
作者
殷伟凤
YIN Wei-feng (Zhejiang University of Media and Communications, Hangzhou 310018, China)
出处
《电脑知识与技术》
2011年第8期5383-5384,5389,共3页
Computer Knowledge and Technology