摘要
多通道超高速MUXDAC/DEMUXADC的同步检测主要通过FPGA的数字信号处理方式实现。为了避免了复杂的数学运算,并提高时钟频率的检测范围,提出了一种新的检测方法—延迟乒乓互触发法对反馈时钟鉴相。给出了该方法的电路实现原理和电路时序容限计算方法。电路实验表明在2.95 GHz以下采样率,该方法均能实现准确的相差检测,稳定性和频率检测范围优于数字信号处理方式。
The synchronous detection of multi-channel high-speed MUXDAC/DEMUXADC is mainly based on cllgltal signal processing FPGA. In order to avoid the complex mathematical operations,and increase the clock frequency detection range, a new detection method（ping-pong delay co-trigger） is proposed to detect the phase difference of feedback clocks. The principle of the method and circuit timing tolerance are proposed. The following experiments show that the accurate phase difference is achieved with sampling frequency up to 2.95 GHz,and the stability and frequency detection range is better than the digital signal processing.
出处
《国外电子测量技术》
2011年第8期58-62,共5页
Foreign Electronic Measurement Technology
关键词
多通道
同步
延迟乒乓互触发法
multi-channel
synchronization
ping-pang delay co-trigger
