期刊文献+

基于CUDA架构的三维CPML-FDTD并行方法 被引量:4

Three dimensional CPML-FDTD parallel algorithm based on CUDA
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摘要 为解决时域有限差分(FDTD)算法应用于电大尺寸目标仿真的巨大耗时问题,应用FDTD算法的并行特性和通用图形处理器(GPGPU)技术,实现了一种基于计算统一设备架构(CUDA)的三维FDTD并行计算方法,采用了时域卷积完全匹配层(CPML)吸收边界条件模拟开域空间,对不同网格数目标仿真计算。进一步结合FDTD算法和CUDA的特点进行了优化,当计算空间元胞数在十万数量级及以上时,优化前后GPU运算相对于同时期的CPU分别可获得10和25倍以上的加速,结果表明该方法较适合用于实际电磁问题的仿真。 Finite Difference Time Domain(FDTD)algorithm costs much time in simulating the electrical-large object.To overcome the drawback,a three-dimensional parallel FDTD algorithm based on Computer Unified Device Architecture(CUDA) is implemented,where the parallel property of FDTD and General Purpose Graphics Processing Units(GPGPU) technique are utilized effectively,and the Convolutionary Perfectly Matched Layer(CPML) absorbing boundary is adopted.Combining the property of FDTD and CUDA,the algorithm is further optimized.Compared with the performance of CPU in the corresponding period,the proposed algorithm is precise and high-speed.The accelerating ratio can reach 10 before optimization and more than 25 after optimization when there are more than 100 thousand Yee cells in simulation field,which shows that the algorithm is fit to simulate electrical-large object.
出处 《计算机工程与应用》 CSCD 北大核心 2011年第25期220-223,共4页 Computer Engineering and Applications
基金 国家重点基础研究发展计划课题(973)(No.2009CB930503 No.2009CB930501 No.2007CB613203) 山东省优秀中青年科学家科研奖励基金(No.BS2009NJ002)~~
关键词 时域有限差分(FDTD) 并行计算 时域卷积完全匹配层(CPML) 基于计算统一设备架构(CUDA) 通用图形处理器(GPGPU) 加速 Finite Difference Time Domain(FDTD); parallel computing; Convolutionary Perfectly Matched Layer(CPML); Computer Unified Device Architecture(CUDA); General Purpose Graphics Processing Units(GPGPU); acceleration
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参考文献10

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共引文献14

同被引文献30

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