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网线吸收和端口占用分析驱动的FPGA装箱算法

A FPGA Packing Algorithm Based on Analysis of Wire Absorption and Port Occupancy
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摘要 为了减少电路连线寻路距离,提高FPGA装箱算法布通率,根据网线相连节点的分布情况分析了装箱操作对网线吸收和端口占用的影响,构造了布通率驱动吸引函数;并通过对关键路径的吸收来满足路径时延要求,利用爬山法提高资源利用率,提出一种FPGA装箱算法.实验结果验证了该算法的有效性. Increasing routability rate can reduce the distance of electric circuit connection in FPGA.In this paper,a new FPGA packing algorithm is proposed.According to node distribution,routability driven function is defined based on analysis of influence of packing on wire absorption and port occupancy.Path delay requirements are ensured by absorbing critical paths and area-efficiency is improved by hill-climbing.Experimental results are given to show the efficiency of the proposed algorithm.
作者 李鹏 兰巨龙 杨梅樾
机构地区 解放军信息工程大学国家数字交换系统工程技术研究中心
出处 《计算机辅助设计与图形学学报》 EI CSCD 北大核心 2011年第9期1621-1628,共8页 Journal of Computer-Aided Design & Computer Graphics
基金 国家"八六三"高技术研究发展计划(2008AA01A323)
关键词 现场可编程门阵列 装箱 布通率 爬山法 field programmable gate array（FPGA） packing routability hill climbing
分类号 TP391 [自动化与计算机技术—计算机应用技术]
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参考文献16

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二级参考文献16

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共引文献6

计算机辅助设计与图形学学报
2011年 第9期

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