Petri网到VHDL的翻译器设计与实现

Design and Implementation of Petri Net to VHDL Translator

研究了如何用CONPAR语言对Petri网图形进行描述,来获得Petri网模型对应的等效文本文件;然后设计了由Petri网文本文件到VHDL转换的文法规则及对应的语义动作源文件,并由编译工具YACC自动生成Petri网到VHDL转换的语法分析器;语法分析生成的中间代码是一棵抽象语法树,可以自顶向下遍历此抽象语法树,并按照相应的语义规则,通过比较Petri网文本描述和VHDL代码的差别生成VHDL目标代码;由此实现了Petri网到VHDL的翻译器,为基于Petri网的并行控制器的自动硬件实现提供了一种快速有效的方法。

The authors study how to describe Petri Net graphics in CONPAR language to get the equivalent textual file of Petri Net model. Then we design the grammar rule and its corresponding semantic action source file of Petri Net textual file to VHDL conversion. The syn- tactic analyzer of Petri Net to VHDL conversion is generated by compiler tool YACC automatically. The middle codes which generated by syntactic analysis are an abstract syntax tree. We can traverse the abstract syntax tree top--down. According to the corresponding semantic rule, then the VHDL object codes are generated by comparing the difference between Petri Net＇ s textual description and VHDL codes. Thus Petri Net to VHDL translator is implemented. It provides a fast and effective method for the automatic hardware implementation of Pe- tri Net--based parallel controllers.