并行流水结构的常数模盲均衡器

A Parallel Pipelined Architecture for Blind Equalizer of Constant Modulus Algorithm

常数模算法在信道均衡中有着非常广泛的应用,采用传统方式实现时,常数模盲均衡器具有吞吐量低和处理速度慢的缺点;为了克服这些缺点,在充分研究常数模算法特性的基础上,利用加法树和串并转换思想,结合这两者的优点构造了一种并行流水结构的盲均衡器,并用FPGA对整个设计进行了分模块实现;理论分析、Matlab仿真与实际QPSK信号测试表明,改进后的盲均衡器不仅能够有效地消除码间干扰并保留了传统盲均衡器的健壮性,而且具有吞吐量高和处理速度快的特点,适合在高速率均衡中应用。

Constant modulus algorithm （CMA） is widely used in the channel equalization, the conventional blind equalizer of CMA has low throughput and slow speed. To overcome these shortcomings, based on studying the characteristics of CMA, an improved blind equalizer with the parallel and pipelined architecture is proposed by using the idea of the adder tree and serial--to--parallel, then the whole design is implemented by FPGA. Theoretical analysis, Matlab simulation and practical QPSK test shows that the new blind equalizer has the charac- teristics of fast processing speed and high throughput while preserves robustness of the conventional blind equalizer. The new blind equalizer is suitable for high--speed equalization environment.