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CMOS high linearity PA driver with an on-chip transformer for W-CDMA application

CMOS high linearity PA driver with an on-chip transformer for W-CDMA application
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摘要 A fully integrated high linearity differential power amplifier driver with an on-chip transformer in a standard 0.13-μm CMOS process for W-CDMA application is presented.The transformer not only accomplishes output impedance matching,but also acts as a balun for converting differential signals to single-ended ones.Under a supply voltage of 3.3 V,the measured maximum power is larger than 17 dBm with a peak power efficiency of 21%.The output power at the 1-dB compression point and the power gain are 12.7 dBm and 13.2 dB,respectively. The die size is 0.91×1.12 mm;. A fully integrated high linearity differential power amplifier driver with an on-chip transformer in a standard 0.13-μm CMOS process for W-CDMA application is presented.The transformer not only accomplishes output impedance matching,but also acts as a balun for converting differential signals to single-ended ones.Under a supply voltage of 3.3 V,the measured maximum power is larger than 17 dBm with a peak power efficiency of 21%.The output power at the 1-dB compression point and the power gain are 12.7 dBm and 13.2 dB,respectively. The die size is 0.91×1.12 mm^2.
出处 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2011年第9期106-111,共6页 半导体学报(英文版)
基金 Project supported by the National High Technology Research and Development Program of China(No.2009AA011605)
关键词 CMOS PA driver on-chip transformer impedance transformation linearity efficiency CMOS PA driver on-chip transformer impedance transformation linearity efficiency
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