1024点高速FFT处理器的FPGA设计与实现

Design and realization of 1024-point high-speed FFT processor based on FPGA

目的设计满足高速实时信号处理需要的快速傅里叶变换（FFT）处理器。方法采取基一2按频率抽取（DIF）FFT算法，蝶形运算单元采用流水线方式，接收数据采用乒乓操作的方法设计基于现场可编程门阵列（FPGA）的1024点、32位字长、定点复数FFT处理器。结果在时钟100MHz下，计算1次1024点定点FFT耗时约为62．95μs。该处理器能达到高速实时系统的要求。结论将FFT算法的理论研究应用于超声诊断仪中自适应动态滤波器系统和超声多普勒血流测量系统平台有一定的参考价值。

Objective To design a fast fourier transform （FFT） processor to meet the needs for high-speed and real-time signal processing. Methods A 1 024-point, 32-bit, fixed, complex FFT processor was designed based on field programmable gate array （FPGA） by using radix-2 decimation in frequency（DIF） algorithm and pipeline structure in the butterfly module and ping-pong operation in data storage unit. Results When the primary clock was 100 MHz, 1 024-point FFT calculation took about 62.95us. The processor was fast enough for processing highspeed and real-time signals. Conclusion The results provides reference value that theoretical study of the FFT algorithm can be applied in the adaptive dynamic filter of ultrasonic diagnostic system and ultrasonic doppler flow measurement system.