不同ALU实现方法的功耗研究

The Research on Power Dissipation of Different ALU Implementation Schemes

低功耗是微处理器设计中一项具有挑战性的工作。对每一个组成单元进行功耗优化是进行低功耗微处理器设计必不可少的一种方法。算术逻辑单元(Arithmetic and Logic Unit,ALU)是微处理器中最基本的组成单元之一。ALU的结构与功耗、延迟和面积有着复杂的联系。常用的ALU结构有三种:复合结构、加法器独立结构和链式结构。基于这三种结构,实现了一个8比特ALU,通过对这个8-bit ALU进行功耗分析来研究ALU的结构对功耗的影响。研究结果表明:复合结构ALU具有最小的功耗,与其它两种结构的ALU相比,能分别节省19.38%和33.87%的功耗。

Low power is a challenging work in micro-processor design.Implementing power optimization on all components of the processor is a choice.One of the most basic components in micro-processor is the Arithmetic and Logic Unit（ALU）.The architecture of ALU has several implications on power consumption,delay and area.There are three common ALU architectures：complex architecture,adder independent architecture and chain architecture.To find out which ALU architecture provides the best power efficiency,an 8-bit ALU of the three different architectures is designed.Compared with other architectures,the power savings of complex architecture are 19.38% and 33.87%.