期刊文献+

基于SoPC的前端RapidIO接口设计 被引量:3

Design of Front RapidIO Interface Based on SoPC
下载PDF
导出
摘要 针对现代高性能嵌入式系统高速RapidIO信号接入的应用需求,提出一种基于可编程片上系统(SoPC)的前端RapidIO接口设计方案,以VirtexII Pro现场可编程门阵列芯片为核心,利用RapidIO IP核等库资源及硬件编程实现RapidIO接口、低压差分信号图像接口、RS422控制接口间的信息转发逻辑。该方案能够提高信息采集和输出的时效性。 With respect to the requirement of high speed RapidIO signal connection of high performance embedded system,this paper proposes a method for a front RapidIO interface on System-on-a-Programmable-Chip(SoPC).The method builds message transmission logic among RapidIO interface,Low Voltage Differential Signal(LVDS) image interface and RS422 control interface with RapidIO IP core and hardware programming based on the development platform of Xilinx VirtexII Pro.Hardware architecture diagrams and key design thoughts are introduced and the software architecture is presented.
出处 《计算机工程》 CAS CSCD 北大核心 2011年第20期239-241,245,共4页 Computer Engineering
关键词 嵌入式系统 可编程片上系统 RAPIDIO协议 低压差分信号 embedded system System-on-a-Programmable-Chip(SoPC) RapidIO protocol Low Voltage Differential Signal(LVDS)
  • 相关文献

参考文献4

二级参考文献13

  • 1尹亚明,李琼,郭御风,刘光明.新型高性能RapidIO互连技术研究[J].计算机工程与科学,2004,26(12):85-87. 被引量:20
  • 2Fuller S.RapidIO嵌入式系统互连[M].王勇,译.北京:电子工业出版社,2006-06.
  • 3BennerAF.存储区域网路光纤通路技术[M].胡先志,译.北京:人民邮电出版社,2003.
  • 4ECMA-342, RapidIO Interconnect Specification. http://www.rapidio.org/spec.2001.3
  • 5Jan M.Rabery. Digital Integrated circuits: a design perspective. Prentice-Hall Inc, 1999.
  • 6Dan Bouvier. An Embedded System Component Network Architecture. RapidIO Technical Working Group, 2001.
  • 7Xilinx Inc. white paper: VirtexII data sheet. 2001.
  • 8Sam Fuller等著,王勇,林粤伟,吴冰冰等译.RapidIO嵌入式系统互连[M].北京:电子工业出版社,2006.
  • 9RapidlO Specifications 1.3[Z]. www.rapidio.org/specs/current
  • 10LogiCORE RapidlO Logical I/O and Transport Layer v4.1.

共引文献11

同被引文献19

引证文献3

二级引证文献15

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部