摘要
提出了一种基于电流模式的折叠分级式A/D转换器(ADC),分析了电路原理和结构,阐述了如何提高ADC的性能。测试表明,电路已达到相关性能指标。转换速率为80MS/s,在3.0MHz输入信号下的信噪失真比(SINAD)为44.4dB,有效位数(ENOB)为7.1位。给出了已实现ADC电路的结构、测试波形和动态性能测试结果。
A current-mode folded subranging A/D converter was presented.The operational principle and structure of the circuit were analyzed.Key issues associated with improvement of ADC performance were elaborated.Test results showed that the proposed ADC achieved a sampling rate of 80 MS/s,an SINAD of 44.4 dB and an ENOB of 7.1 bits for 3.0 MHz input signal.Architecture of the proposed ADC was described.Test waveforms were presented and dynamic parameters were discussed in detail.
出处
《微电子学》
CAS
CSCD
北大核心
2011年第5期627-631,共5页
Microelectronics
基金
国家自然科学基金资助项目(90407001
60901016)
关键词
A/D转换器
折叠分级
电流模式
模拟余差
A/D converter
Folded subranging
Current mode
Residue of analogue quantity
