期刊文献+

片上网络容错路由算法分析和评价

Analysis and Evaluation of Fault-tolerant Routing Algorithms for NoC
下载PDF
导出
摘要 片上网络技术是借鉴并行分布式计算机及传统计算机网络的概念解决片上多核系统的通信问题。片上网络代替片上总线通信,解决了片上总线结构所引起的可扩展性、效率、面积、功耗等问题。然而,片上网络在数据传输过程中可能由于各种原因产生故障,因此片上网络可靠性研究是当前一个研究热点。首先总结了片上网络故障分类,比较和分析了当前片上网络容错算法并给出其优势和缺陷,最后对全文进行总结,并给出了片上网络容错算法的展望。 Borrowing ideas from the concept of parallel distributed processing system and traditional computer networks,Network-on-Chip technology solves the problems of multi-core SoC.NoC takes the place of the bus on the SoC to solve the reliability,power consumption,area,efficiency which caused by the bus.However,NoC may result in the faults when it transmits the data.So the reliability of network on-chip is a hot topic currently.This paper summarizes the classification of the network on-chip faults,analyzes and compares the fault-tolerant algorithms meanwhile,points out the advantages and disadvantages of these algorithms.Then the paper gives a conclusion.finally presents future works about fault-tolerant routing algorithms on NoC.
作者 李本娟 王嘉芳 姜誉 李旭亮 LI Benjuan,WANG Jiafang,JIANG Yu,LI Xuliang(School of Computer Science and Technology,Heilongjiang University,Harbin 150080,China)
出处 《智能计算机与应用》 2011年第3期64-65,68,共3页 Intelligent Computer and Applications
基金 哈尔滨市科技创新人才研究专项基金(2011RFLXG013) 黑龙江省自然科学基金(F200823)资助
关键词 片上网络 容错算法 永久性故障 瞬时性故障 路由算法 NoC Fault-tolerant Algorithms Permanent Faults Transient Faults Routing Algorithms
  • 相关文献

参考文献8

  • 1高明伦,杜高明.NoC:下一代集成电路主流设计技术[J].微电子学,2006,36(4):461-466. 被引量:31
  • 2SEYRAFI M,ASAD A.A new low cost fault tolerant sdolutionfor mesh based NoCs. International Conference on Electroni-cs and Information Engineering . 2010
  • 3PIRRETTI M,LINK G M,BROOKS R Ret al.Fault tolerantalgorithms for network-on-chip interconnect. Proc.Of IEE-EE International Annual Symposium on VLSI . 2004
  • 4NI C G.The turn model for adaptive routing. . 1994
  • 5LI Ming,ZENG Qingan,JONE Wenben.DyXY-A proximity c-ongestion-aware deadlock-rree dynamic routing method for net-work on chip. Design Automation Conference . 2006
  • 6STEWART W J.Introduction to the numerical solutions of m-arkov chains. . 1994
  • 7Benini L,Micheli GD.Networks on chips:a new SoC paradigm. IEEE Computer . 2002
  • 8Chiu,G. M.The odd-even turn model for adaptive routing. IEEE Transactions on Parallel and Distributed Systems . 2000

二级参考文献12

  • 1ITRS.International Technology Roadmap for Semiconductors[EB/OL].http://public.itrs.net.2003.
  • 2ITRS.International Technology Roadmap for Semiconductors[EB/OL].http://public.itrs.net.1999.
  • 3Tully J,Gordon R,Bruederle S,et al.Hype cycle for semiconductors,2004[R].Gartner research's Technical Report,2004.ID Number:G00120909:2-3.
  • 4Benini L,De Micheli G.Networks on chips:a new SoC paradigm[J].Computer,2002,35(1):70-78.
  • 5Jerraya A,Wolf W,eds.Multiprocessor systems-on-chips[M].San Francisco,Morgan Kaufman / Elsevier,2004.
  • 6Hemani A,Jantsch A,Kumar S,et al.Network on chip:an architecture for billion transistor era[A].Proc IEEE NorChip Conf[C].Turku,Finland.2000.166-173.
  • 7Guerrier P,Grenier A.A generic architecture for on-chip packet-switched interconnections[A].Des Autom and Test in Euro Conf[C].Paris,France.2000.250-256.
  • 8Pham D.The design and implementation of a first-gen-eration CELL processor[A].Int Sol Sta Circ Conf[C].San Francisco,CA,USA.2005.184-185.
  • 9Glossner G.The sandbridge sandblaster SB3000 multithreaded CMP platform[A].5th Int Forum Appl Spec Multi-Processor SoC[C].Relais de Margaux,France.2005.18-23.
  • 10Jantsch A,Tenhunen H.Networks on chip[M].Dordrecht:Kluwer Academic Publishers,2003.

共引文献30

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部