摘要
为解决多进制LDPC码基于FFT-BP译码算法不利于硬件实现的问题,提出了一种改进算法:利用对数运算,将乘法运算变换成对数域上的加法运算,从而降低复杂度,便于硬件实现。对该算法在高斯白噪声信道,基于GF(4)有限域、码率0.5的规则LDPC码(486,972)进行了仿真分析。结果显示:改进的FFT-BP译码算法相对传统的FFT-BP译码算法,在误码性能上损失极小(当误码率10-4时,信噪比损失大约0.07dB)情况下,能够使译码算法硬件复杂度得到较大的改善。
An improved decoding algorithm is presented in order to solve the problem of inconvenient for hardware implementation in decoding algorithm for non-binary LDPC codes based on the FFT-BP algorithm.The innovation of the new algorithm is the importing of the logarithmic operations,which will transform multiplication operations to addition operations in the logarithmic domains.Thus the presented algorithm has the advantages of the reduced complexity and the more convenient hardware implementation.A simulation is made using regular non binary LDPC(codes(486,972),code rate 0.5)under White Gaussian Noise channel based on GF(4).The result shows that the decoding complexity is much more reduced with the performance decrease by about 0.07 dB when BER(bit error rate)is 10-4
出处
《装备指挥技术学院学报》
2011年第5期89-92,共4页
Journal of the Academy of Equipment Command & Technology