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IEEE1588协议硬件时间戳标记电路设计 被引量:6

Design of Hardware Timestamp Circuit Based on IEEE1588
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摘要 IEEE1588协议是一种基于网络多播技术的精密时钟同步协议,为了提高时钟同步的精度,提出了一种在以太网物理层和MAC层之间的介质无关接口(MII/RMII)处检测同步报文的策略和实现精确时间戳标记方案,在此方案基础上设计和实现了基于FP-GA的硬件时间戳标记电路;设计了相关测试平台,对设计电路进行了测试和验证,测试结果表明设计的时间戳标记电路可以在RMII接口处实时地标记同步报文的收发时间戳,设计达到课题要求,应用性能良好。 IEEE1588 protocol is a precise clock synchronization protocol based on multicast technology. To improve high-precision clock synchronization, a detecting and time--stamping strategy based on IEEE1588 for Synchronous Packet in Reduce Media Independent Interface (RMII) is proposed. On the basis of this program, a hardware timestamp circuit based on FPGA is designed. Relevant test platform was designed and the circuit is tested, in which the test results show that time-stamping circuit can mark time stamp of time messages in RMII immediately and the design meet the subject requirements and have a good application performance.
出处 《计算机测量与控制》 CSCD 北大核心 2011年第10期2532-2535,共4页 Computer Measurement &Control
基金 广西信息与通讯技术重点实验室主任基金(PF090029)资助项目
关键词 IEEE1588 RMII 时钟同步 FPGA IEEE1588 RMII clock synchronization FPGA
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共引文献78

同被引文献48

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