一种新型结构栅耦合ggNMOS ESD保护电路研究

Study on a new structure gc-ggNMOS ESD protection circuit

针对现有栅耦合NMOS(gate coupled NMOS,gcNMOS)静电放电(electrostatic discharge,ESD)保护电路对特定ESD脉冲不能及时响应造成的"触发死区"现象,本文提出了一种全新结构的栅耦合栅接地NMOS(gate coupled gate grounded NMOS,gc-ggNMOS)ESD保护电路,这种结构通过利用保护电路中漏、栅交叠区的寄生电容作为耦合电容,连接保护电路栅与地的多晶硅(poly)电阻作为耦合电阻,在有效解决原有gcNMOS结构"触发死区"现象的同时,还避免了因引入特定耦合电容带来版图面积的增加,进而提高了ESD保护电路鲁棒性指标。本文采用ISE-TCAD仿真软件,建立了0.6μm CSMC6S06DPDM-CT02CMOS工艺下gc-ggNMOS ESD保护电路的3D物理结构模型,并对此种结构中关键性参数耦合电阻、电容与触发电压特性的关系进行了系统仿真。仿真表明,当耦合电容为定值时,保护电路触发电压随耦合电阻阻值的增加而减小,这一结果与流片的传输线脉冲(transmission line pulsing,TLP)测试结果吻合。全新结构的gc-ggNMOS ESD保护电路通过了5KV人体放电模式(human body model,HBM)测试。本文的研究结果为次亚微米MOS ESD保护电路的设计提供了一种新的参考依据。

For traditional gate coupled NMOS（gcNMOS） electrostatic discharge（ESD） protection circuit,some specific ESD pulse can not be able to response timely.This phenomenon is called ＂trigger dead zone＂.A new structure of gate coupled gate grounded NMOS（gc-ggNMOS） ESD protection circuit is proposed in this paper.In the presented circuit,the parasite capacitance between the drain and the gate overlap region is used as coupled capacitance,and the poly resistance that connect the gate and the ground of protection circuit is used as coupled resistance.The ＂trigger dead zone＂ phenomenon of traditional gcNMOS structure is solved effectively,and increase of layout area caused by the introduction of additional coupled resistance is avoided,so that the robustness of ESD protection circuit is improved.ISE-TCAD simulation software is used to model and simulate 3D physical structure of gc-ggNMOS ESD protection circuit under 0.6μm CSMC 6S06DPDM-CT02 CMOS technology.The effect of coupled resistance and capacitance variation on protection circuit trigger voltage characteristics is investigated.The simulation results show that protection circuit trigger voltage is inversely proportional to the coupling resistance value when capacitance is constant.The simulation results coincide with the transmission line pulsing（TLP） measurement results of several gc-ggNMOS tape-out.5kV human body model（HBM） test on the new gc-ggNMOS ESD protection circuit is conducted and expected results are achieved.The proposed simulation model and results can be used as a guideline for designing submicron MOS ESD protection circuits.