基于FPGA光纤扰动检测算法的设计与实现

Design and Implementation of Fiber Intrusion Detection Algorithm Based on FPGA

目前光纤通信应用日益广泛,通信的保密性也变得越来越重要。光纤扰动检测技术,是保密光通信和光纤侵入预警等光纤应用系统的核心技术,通过检测光纤中传输信号的强度变化,分析出是否有外界侵入。当前常用的扰动检测方法,存在系统构架庞大、应用模式狭窄、速度慢等缺点。利用FPGA并行处理结构及丰富的逻辑资源等特点,设计了基于FPGA纯硬件方式实现光纤扰动检测的算法。设计采用寄存器传输级(RTL)硬件描述语言Verilog HDL,利用交叉相乘的处理方式,完成了光纤扰动检测算法在FPGA上的实现。整个系统基于Altera公司的CycloneⅡ系列EP2C35F672C6器件于DE2平台上进行了硬件测试,共消耗4092个逻辑资源,最高工作频率达到132.33 MHz,处理完一组实测的光纤扰动400000个数据用时53.8 ms,满足系统检测的要求。

With the development of fiber communication, the confidentiality has become increasingly important. The technology of intrusion detection is the key step within secure communication and distributed optic-fiber intrusion early warning system. When the optical fiber is disturbed, the light through the optical fiber will change in the light intensity, by detecting the changes, the outside intrusion can be detected. The usual methods of intrusion detection have some shortcomings, such as the larger system, the narrower application model or the slower speed. Considering rich register resources of FPGA and the ability to meet high-speed system design, a pure hardware realization on FPGA to detect the intrusion of fiber is proposed, which is accomplished by register-transfer level （RTL） description, and employs cross-multiplication approach to improve its performance. The whole design is simulated with ModelSim and tested in the Cyclone II-based development board（ DE Ⅱ）. The resource consumes 4092 logic elements. The maximal work frequency is 132.33 MHz, and it can process 400, 000 data within only 53.8 ms.