摘要
本文简介了一种基于FPGA和DSP，对ADC系统进行性能分析并对其转换后的数字进行数据采集的方法。其中性能分析主要是针对ADC的信噪比和无杂散动态范围。同时，主要介绍了ADC系统中时钟、电源、模拟信号输入等方面性能改善的方法。并以此来提高SNR，实现对有效位数和整体性能的提高。
This paper briefly introduces a kind of FPGA and DSP based method that analyzes the performances of ADC system and acquires its converted data. The performance analysis mainly aims at the signal-to-noise ratio （SNR） and the spurious free dynamic range （SFDR） of ADC. Meanwhile, the paper mainly describes the method for the performance improvements of the aspects of clock, power source, analog signal input, etc. in the ADC system, thus the SNR and ENOB as well as the whole performance can be improved.
出处
《自动化信息》
2011年第10期41-43,共3页
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