CMOS低噪声放大器的噪声系数优化

Noise Figure Optimization of CMOS Low Noise Amplifier

目前大量的研究文献已经描述了如何找到使噪声系数最小的低噪声放大器输入网络的最佳品质因数,但是它们往往遗漏了一个重要的参数——源极电感负反馈低噪声放大器中的栅极电感,它的寄生阻抗为低噪声放大器增加了明显的噪声。本研究课题提出了2种优化方法,这2种方法均满足功率匹配并均衡了晶体管所产生的噪声贡献和栅极寄生阻抗所产生的噪声贡献,从而实现了在栅极电感品质因数、功耗、增益限制下的噪声优化。

A large quantity of literature describes how to determine optimum quality factor of the low noise amplifier input network for minimum noise figure.However,an important parameter in the source-degenerated low noise amplifier,that is the gate inductor,is usually neglected,its parasitic series resistance could add significant noise to the low noise amplifier.Two optimization methods are proposed,and both could satisfy the power match and balance the noise contribution from transistor and the noise contribution from parasitic resistances,thus achieving the best noise performance under the integrated constraints of gate inductor quality factor,power consumption,and gain.