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应用于倍频电路的吞脉冲分频器设计

Design of pulse swallow divider applied to frequency circuit
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摘要 分析了应用于倍频电路的吞脉冲分频器的工作原理,建立了基于Simulink和FPGA的分频器模型。实验结果表明,该分频器可以实现双模分频功能,并能大幅度降低数字电路的功耗,为开发实用倍频电路提供了可行途径。 The principle of pulse swallow divider applied to frequency circuit is analysed. Then establish divider model based on Simulink and FPGA. Experimental results inicate that divider can achieve dual-modulus divider function, at same time the power consumption of frequency circuit is significantly reduced. It provides a viable practical way for the development of frequency circuit.
出处 《电子技术应用》 北大核心 2011年第11期67-69,共3页 Application of Electronic Technique
关键词 倍频电路 吞脉冲分频器 功耗 frequency circuit pulse-swallow divider power consumption
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参考文献6

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