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Analysis and optimization of current sensing circuit for deep sub-micron SRAM

Analysis and optimization of current sensing circuit for deep sub-micron SRAM
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摘要 A quantitative yield analysis of a traditional current sensing circuit considering the random dopant fluctuation effect is presented. It investigates the impact of transistor size, falling time of control signal CS and threshold voltage of critical transistors on failure probability of current sensing circuit. On this basis, we present a final optimization to improve the reliability of current sense amplifier. Under 90 nm process, simulation shows that failure probability of current sensing circuit can be reduced by 80% after optimization compared with the normal situation and the delay time only increases marginally. A quantitative yield analysis of a traditional current sensing circuit considering the random dopant fluctuation effect is presented. It investigates the impact of transistor size, falling time of control signal CS and threshold voltage of critical transistors on failure probability of current sensing circuit. On this basis, we present a final optimization to improve the reliability of current sense amplifier. Under 90 nm process, simulation shows that failure probability of current sensing circuit can be reduced by 80% after optimization compared with the normal situation and the delay time only increases marginally.
出处 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2011年第11期157-161,共5页 半导体学报(英文版)
基金 supported by the State Key Development Program for Basic Research of China(No.2006CB3027-01)
关键词 current sensing MISMATCH yield and speed optimization current sensing mismatch yield and speed optimization
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参考文献12

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