新型可编程锁相环锁定检测器设计

A Novel Programmable Lock Detector in Phase Locked Loop

采用SMIC 0.18μm工艺设计并验证了一种新型可编程锁相环锁定检测器.锁定检测器使用了新型脉宽检测电路将可编程脉宽检测门限与鉴相器输出相位差脉冲的宽度进行对比,并以此做出锁定判断.新型锁定检测器使用了时钟抽取电路以从锁相环参考时钟和反馈时钟中生成系统时钟,保证了在参考时钟丢失的情况下亦能正常工作.测试结果显示锁定检测器工作正常且能够在不同门限下进行准确地判断.

A novel programmable lock detector in phase locked loop is fabricated in SMIC 0. 18μm process. A novel pulse width detector in the lock detector is proposed to compare its programmable threshold with the pulse width of the phase detector＇s output which is proportional to the phase error, and the results are adopted to judge whether PLL is locked. A clock extractor is proposed to get clock from not only the reference clock but also the feedback clock of PLL as the system drive clock, so that the circuit could keep working correctly when the reference clock is lost. The measurements results show that the lock detector works well and can make accurate judgment with different thresholds.