摘要
介绍了基于FPGA的以太网MAC控制器的设计,主要实现了半双工模式下CSMA/CD协议、全双工模式下Pause帧的收发,以及对物理层芯片中寄存器的读写访问。设计采用Verilog硬件描述语,按照自顶向下的设计流程描述了以太网的主要功能模块,该控制器通过Modelsim进行了仿真并进行了FPGA板级验证,验证其能够满足802.3标准的要求。
The design of Ehernet MAC controller based on FPGA is described. The controller realizes the CSMA/CD (Carrier Sense Multiple Access/Collision Detection)protocol in half duplex mode and the transmitting and receiving of Pause frame in full duplex mode, and it can access the register in the physical chip. The whole design is described in a way of top-down design flow with Verilog hardware description language. We simulated the design with Modelsim and verified it with FPGA board. The test result shows that the design can satisfy the requirement of 802.3 standard.
出处
《电子设计工程》
2011年第21期163-165,169,共4页
Electronic Design Engineering
基金
山东省优秀中青年科学家科研奖励基金(BS2011DX029)
青岛市科技发展计划项目资助课题(11-2-4-4-(6)-jch)