摘要
随着卫星应用技术的发展,导航模拟器必须能够产生越来越精确的动态时钟信号。传统方法是采用外置直接数字频率合成(DDS)芯片,针对这种传统方法精度受限等局限性,提出了一种新的高精度动态时钟产生方法,使用可编程逻辑电路(FPGA)片内资源,完成多级DDS调整,给出理论计算,得到精度结果,并进行工程应用可行性分析。结果表明,这种方法能够达到高精度的要求,并且可以用于工程实践。
With the development of satellite application technology,navigation simulator must be able to produce more accurate dynamic clock.Traditional method is to use external DDS chip,but it is limited in accuracy and other aspects.A new method for high-precision dynamic clock is presented,which uses FPGA chip resources and completes multi-level adjustment of DDS,theoretical calculations are given,and the accuracy results are obtained.Finally,the feasibility of engineering application is analyzed.The results show that this method can achieve high accuracy requirements and be used in engineering practice.
出处
《无线电工程》
2011年第11期37-39,共3页
Radio Engineering
关键词
导航模拟器
动态时钟
多级DDS
navigation simulator
dynamic clock
multi-level DDS
