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航空电子高速交换式网络的服务质量保证方法

Quality of service guarantee for avionics high-speed switched network
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摘要 以保证航空电子高速交换式网络的实时性和高带宽为目的,提出光纤通道(FC,Fibre Channel)通信协议承载于波分复用(WDM,Wavelength Division Multiplexing)传输机制之上的架构.采用适用于实时交换的周期性数据流模型,提出了基于负载匹配的输出轮询(LOR,Load-matching Output Round)调度算法.该算法仅使用一次仲裁即可达到输入/输出的最大匹配(100%).给出LOR算法的核心代码,时间复杂度仅为O(1),易于在硬件中实现.最后通过将LOR算法嵌入到网络处理器中,注入时间敏感的负载流量,以服务质量特性(延迟、吞吐和超时消息数)为性能衡量指标进行实验,结果表明LOR算法在轻负载(30%)下,服务质量特性与经典算法(iSLIP,DRR,EDRR)基本持平;在重负载(70%)下,仅LOR算法能满足延迟的实时性要求,且LOR吞吐率高于经典算法近10个百分点,超时消息数比经典算法少了100个以上. To achieve avionics network's real-time and high bandwidth performance, the fibre channel (FC) over wavelength division multiplexing(WDM) architecture was established, which adopt the periodical flows for real-time communication in switches, and the scheduling algorithm based on load-matching output port round( LOR) was proposed. Using only once arbitration, LOR could obtain input/output port's maximum matching (100%). Core code of LOR was described after that, which had O ( 1 ) complexity and could be embed into hardware suitably. Finally, the experiments were conducted at network processor under time-sensitive load in term of quality of service (QoS) parameters (delay, throughput and overtime packets number), and the results show that under low load (30%) LOR algorithm has the same QoS performance with traditional algorithms (iSLIP, DRR, EDRR) , but under heavy load (70%) only LOR could satisfy real-time delay con- straint, and throughput of LOR is nearly more than 10% than traditional algorithms, and overtime packet number of LOR is less 100 than traditional algorithms'.
出处 《北京航空航天大学学报》 EI CAS CSCD 北大核心 2011年第10期1233-1237,共5页 Journal of Beijing University of Aeronautics and Astronautics
基金 国家自然科学基金资助项目(60879024) 航空科学基金资助项目(20081951028)
关键词 航空电子 计算机网络 服务质量 调度算法 网络质量 最大匹配 avionics computer networks quality of service scheduling algorithm network performance maximum-matching
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参考文献12

  • 1INCITS FC-SW-5 REV8.5 2009 Fibre channel-switch fabric-5 [s].
  • 2INCITS FC-FS-3 REV 0.90-2009 Fibre channel-framing and signaling-3 [ S ].
  • 3Elhanany I,Hamdi M. High-performance packet switching architectures [ M J. London : Springer-Verlag,2007.
  • 4Reardon C, Profumo J, George A. Comparative simulative analysis of WDM LANS for avionics platforms ~ C ~//Military Communications Conference. Washington : MILCOM ,2006 : I-7.
  • 5Anderson T, Owicki S S, Saxe J B, et al. High speed switch scheduling for local area networks [ J ]. ACM Trans Computer Systems,1993,11 (4) :319 -352.
  • 6熊庆旭.输入排队结构交换机分组调度研究[J].通信学报,2005,26(6):118-129. 被引量:17
  • 7Liu J W S. Real time systems [ M ]. Beijing: Higher Education Press ,2002.
  • 8Comer D E. Network systems design using network processors:intel 2XXX version [M]. London:Prentice Hall,2005.
  • 9Intel Corporation. Intel IXP2400 and IXP2800 network processor programmer's reference manual [ R]. 252539-006,2005.
  • 10McKeown N. The iSLIP scheduling algorithm for input-queued switches[J]. IEEE Trans on Networking, 1999,7 ( 2 ) : 188-201.

二级参考文献67

  • 1NDERSON T, et al. High speed switch scheduling for local area networks[J]. ACM Trans Comput Syst, 1993, 11(4): 319- 352.
  • 2MCKEOWN N. Scheduling Cells in an Input-Queued Switch[D].University of California at Berkeley, 1995.
  • 3MCKEOWN N. The iSLIP scheduling algorithm for input-queued switches[J]. IEEE/ACM Trans on Networking, 1999, 7(2): 188-201.
  • 4SERPANOS D N, et al. FIRM: A class of distributed scheduling algorithms for high-speed ATM switches with multiple input queues[A]. IEEE INFOCOM'00[C]. Tel Avlv, Israel, 2000.548-555.
  • 5ANDREWS M, ZHANG L. Achieving stability in networks of input-queued switches[A]. IEEE INFOCOM'01[C]. Anchorage,Alaska USA, 2001. 1673-1679.
  • 6MARSAN M A, et al. On the throughput achievable by isolated and interconnected input-queued switches under multicasts traffic[A].IEEE INFOCOM'02[C]. New York, 2002. 1605-1614.
  • 7MARSAN M A, et al. Local scheduling policies in networks of packet switches with input queues[A]. IEEE INFOCOM'03[C].San Francisco, CA, USA, 2003. 1395-1405.
  • 8JIANG Y, et al. A fully desynchronized round-robin matching scheduler for a VOQ packet switch architecture[A]. IEEE HPSR'01[C]. Dallas, TX, USA, 2001. 407-411.
  • 9JIANG Y, HAMDI M. A 2-stage matching scheduler for a VOQ packet switch architecture[A]. IEEE ICC'02[C]. New York, NY,USA, 2002. 2105-2110.
  • 10MCKEOWN N, et al. Achieving 100% throughput in an input-queued switch[A]. IEEE INFOCOM '96[C]. San Francisco,CA, USA, 1996. 296-302.

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