摘要
针对当前模式识别技术存在的学习和识别时间长、学习结果可读性差等缺点,提出了一种新型识别方法.首先对4类常见的道路限速标志图像进行定位与特征提取,经预处理的特征向量作为系统训练集和测试集数据;然后在Xilinx Virtex xcv2000E FPGA硬件平台上采用VHDL设计演化硬件识别系统,完成对特征向量数据的学习与识别.为提高演化硬件识别系统的学习速度和识别精度,引入了增量演化和统计识别的思想,并对不同参数设定下的演化硬件识别系统进行了性能对比分析.结果表明:基于演化硬件的道路限速标志识别方法对于不同条件下拍摄的4类限速标志,可以获得92.31%的平均识别率,识别时间达到0.12μs.所提出的方法是一种有效的道路限速标志识别手段.
In order to solve the limitations of traditional recognition methods with long time system learning and recognition,and poor readability of learning results,an evolvable hardware（EHW）-based road speed limit sign recognition method was proposed.Through the processes of location and feature extraction for the four kinds of normal traffic signs,the preprocessed feature vectors were employed as training and test dataset.The EHW-based recognition system was designed by VHDL and realized on a Xilinx Virtex xcv2000E.In order to improve the system learning speed and recognition accuracy,an incremental evolution strategy and a statistical recognition method were introduced.The performance of the EHW recognition system was analyzed and compared for various experimental settings.The results show that under different outdoor environments the average recognition rate and the recognition time of the proposed evolvable system are 92.31% and 0.12 μs,respectively.The proposed scheme is an efficient tool for road limit sign recognition.
出处
《江苏大学学报（自然科学版）》
EI
CAS
北大核心
2011年第6期689-694,共6页
Journal of Jiangsu University：Natural Science Edition
基金
国家自然科学基金资助项目(61075019)
重庆市自然科学基金资助项目(2009BB2080)
教育部留学回国人员科研启动基金资助项目(教外司留[2010]1174号)
重庆邮电大学科研基金资助项目(A2009-06)
关键词
智能系统
模式识别
机器学习
演化算法
FPGA
intelligent system
pattern recognition
machine learning
evolutionary algorithms
FPGA
