SoC中多层AHB总线的断言验证应用

Application of Assertion Verification for Multi-layer AHB Bus in SoC

随着SoC设计复杂程度的不断提高,芯片的功能验证面临的挑战越来越大。断言作为一种描述属性的方法,可以快速地验证设计代码是否满足系统要求。基于断言的验证方法学近年来发展极为迅速,应用也越来越广泛。在基于Multi-layer AHB总线架构上的SoC系统验证过程中,采用System Verilog Assertion验证方法,证明SVA是SoC设计过程中功能验证的一种有效的验证方法。

With the continuous increase of SoC design complexity,the functional verification for chips is confronted with the challenge.The assertion as a method of the property description can quickly verify whether a design code meets the system requirements.Assertion-based verification methodology develops rapidly in recent years and its applications are increasingly widespread.The System Verilog Assertion as a verification method is adopted in the SoC system verification based on Multi-layer AHB bus architecture.The simulation result proves verifies that System Verilog Assertion is an effective method of the functional verification in SoC design.