TD-SCDMA联合检测Cholesky分解的FPGA实现

FPGA Implementation of Joint Detection' s Cholesky Decomposition in TD-SCDMA

时分同步码分多址(TD-SCDMA)是第三代移动通信系统的时分复用(TDD)模式.在TD-SCDMA系统中,解决联合检测算法问题相当于解决系统矩阵的最小均方问题.由于联合检测算法具有较高的运算复杂度,Cholesky分解算法被应用于系统联合检测中,这种算法可以将矩阵分解成上下三角子矩阵,从而有效地降低运算量.文中介绍了一种改进的Cholesky分解算法,分析了其运算复杂度,在FPGA上,用Verilog语言实现了该算法,最后对该算法的性能进行了分析.

Third-generation mobile radio systems use Time Division Synchronous Code Division Multiple Access (TD-SCDMA) in their time division duplex (TDD) mode.In a TD-SCDMA mobile radio system,joint-detection is equivalent to solving a least squares problem with a system matrix.Because Joint Detect algorithm has high computational complexity,algorithm of Cholesky decomposition can divide the matrix into small sub-blocks,the complexity of matrix manipulation is reduced.In this paper,an improved Cholesky decomposition is introduced, its computational complexity is analyzed,then we implement the algorithm on FPGA by using verilog,and analysis its performance.