基于Verilog HDL的电梯系统设计

Design of Lift Controller Based on Verilog HDL Language

从状态机的角度,介绍了一种电梯控制器的Verilog HDL设计方法。将其嵌入到FPGA中,用于实现电梯的控制。着重介绍电梯的总体设计方案,详细描述其内部状态机的工作原理,并提供了电梯中主控制器与分控制器通信部分的Verilog源代码。给出了在Xilinx公司的ISE6.2+ModelSimXE5.6软件平台中进行EDA的综合结果与时序仿真,并遵循方向优先的原则提供3个楼层多用户的载客服务并指示电梯的运行情况。实际应用表明,该系统设计灵活,运行可靠,成本低廉,有一定的应用价值。

The design of the lift controller based on Verilog HDL language at the angle of state machine is introduced. It focuses on the general design of lift and describes the principle of its interior state machine in particular, provides the Verilog source code of the communication of main controller and slave controller, and then the circuit synthesis and simulation are performed on Xilinx's ISE6.2 + ModelSimXES.6. The lift controller will be embedded in the FPGA to control the lift. Following the principle of direction priority, the controller can accomplish passengers transport service of three stories and multiple consumers and indicate the operation state of the lift.