DDS+PLL可编程全数字锁相环及其应用

Research and Application of DDS+PLL Programmable Digital Phase Looked Loop

提出一种采用 DDS+ PL L可编程全数字锁相环的设计方案 ,并介绍这种全数字锁相环的工作原理和应用。其中 ,锁相环采用数字控制频率综合器芯片 NCO作为环路振荡器 ,锁相环路的相位误差调整期望值存放在 RAM中 ,锁相环的工作状态和参数由计算机处理和控制。硬件电路采用大规模集成电路 EPL D集成。锁相环路具有快捕、量化精度高、抗干扰性强 ,任意可编程的特点。

A project for full digital phase locked loop(FDPLL) is presented,and the operation principle and application of the FDPLL are introduced.This set is consisted of a direct digital synthesizer(DDS) and a phase locked loop(PLL).The expecting value of the phase error for PLL is stored in a RAM,and the status and operation parameters are handled by a calculator.A large scale integrated circuit EPLD is used in the set.This FDPLL is featured of quickly catching,high accuracy of quantization,Low susceptibility to interference,and convenient for programming.