一种射频仿真时统子系统的技术设计

Technical design of sub time system in RFSS

针对射频仿真系统中的时间同步问题,设计基于FPGA、DSP和GPS的时间统一系统。从工程实施的角度出发,详细阐述时统的硬件设计,介绍IRIG-B码的解码原理和各采样频率信号输出的过程。试验证明:该时统克服了常规时统设备的不足,性能更稳定,可靠性更高,更易于调试。

Aiming at time synchronization in RF simulation system（RFSS）,designs time system based on FPGA,DSP and GPS.Details on the design of hardware in time system are given from the engineering aspect.The decoding of IRIG-B code and the producing of periodical signal are mainly introuced.The test results indicate that the time system equipments have overcome original time system equipments＇ shortcomings and have some strongpoints：higher stability,higher reliability and easier to debug.