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高压直流开断试验回路等价性

Equivalence of Synthetic Test Circuit on HVDC Interruption
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摘要 本文针对电容储能高压直流开断试验回路的等价性展开讨论,提出了最佳等价时延t_(ds)和最佳开断时延t_(dp)概念;并认为如果选择f≤1/(K′t)(K′=10~25),同时控制t_(ds)≤t_d≤t_(dp),则开断电流的等价性较好。试验回路的等价性还表现在电流零点附近的物理过程和恢复电压的初始部分。 Camparing interrupting test with field test, this paper discusses equivalent conditions on synthetic test circuit for HVDC interruption with capacitive energy storage. The effects of frequency of simulating DC oscillation and various time, at which commutation switch opens, on the interrupting current are studied. Concept of optimal equivalency time tdc and optimal interruption time tdp are described. The synthetic test circuit with f≤1/ (K't0) (K'' = 10-25) and(?) , is recognized to be equivalent to the real circuit. Nice equivalence of test circuit manifests in the initial part of recovery voltage and the physical process near current zero as well.
出处 《中国电机工程学报》 EI CSCD 北大核心 1993年第S1期100-104,共5页 Proceedings of the CSEE
基金 国家自然科学基金
关键词 开断电流 等价性 最佳等价时延 最佳开断时延 Interrupting current Equivalence Optimal equivalent delay Optimal interruption delay
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