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BINARY-TERNARY MIXED-VALUED ENCODING AND MIXED-VALUED COUNTER

BINARY-TERNARY MIXED-VALUED ENCODING AND MIXED-VALUED COUNTER
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摘要 This paper analyses the binary expression of ternary signals and the binary construction of circuits, and proposes the design of a mixed-valued counter by using both binary flip-flops and ternary flip-flops ("tri-flops"). Here a new design of an 8421 BCD up-counter based on the mixed-valued binary-binary-ternary-coded decimal (B2TCD) code using mixed-valued logic is presented. This paper analyses the binary expression of ternary signals and the binary construction of circuits, and proposes the design of a mixed-valued counter by using both binary flip-flops and ternary flip-flops ('tri-flops'). Here a new design of an 8421 BCD up-counter based on the mixed-valued binary-binary-ternary-coded decimal (B2TCD) code using mixed-valued logic is presented.
出处 《Science China Mathematics》 SCIE 1990年第2期228-237,共10页 中国科学:数学(英文版)
基金 Project supported by the National Natural Science Foundation of China
关键词 MULTI-VALUED logic mixed-valued code counter. multi-valued logic, mixed-valued code, counter.
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