摘要
存储器具有存储容量大、集成度高以及工作速度快等特点,被广泛应用于现代电路设计中;在电路中,存储器能否正常工作,将直接影响整个系统工作状态是否稳定;为了提高系统的可靠性,对存储器进行可靠性测试是十分必要的;在介绍了存储器电路结构和故障的基础上,对某含有RAM存储器的CPU板进行了基于边界扫描的BIT测试性设计和改造,并对系统中的RAM芯片进行了测试性验证;实验结果表明,改造后的电路系统能够实现RAM自测试功能,且故障定位准确,达到了预期的设计目的,可有效提高系统的可靠性。
Because of the advantages of large memory capacity, high integration and fast operational speed, memory has been widely used in the modern circuit design. The state of the memory directly affects the reliability of the whole circuit system. In order to improve the system＇ s reliability, it is necessary to take the reliability test. Based on the basic principle of memory and fault types, the boundary scan is de- signed and configuration of one system~ s CPU circuit obtained RAM are presented, and especially validated the RAM memory. Experiment results indicate that the circuit can realize the self--test function of RAM and locate faults precisely, achieve the anticipation purpose, could efficaciously promote the reliability of the system.
出处
《计算机测量与控制》
CSCD
北大核心
2011年第11期2655-2657,共3页
Computer Measurement &Control
基金
总装预研基金(9140A17020910JB3509)
