面向粗粒度数据流网络处理器的混合定制硬件加速

Hybrid Custom Hardware Acceleration for Coarse-grained Dataflow Network Processor

本文针对控制流网络处理器固定拓扑结构的限制及指令集并行性开发的不足,将粗粒度数据流设计思想引入到网络处理器体系结构设计中,提出了一种新型粗粒度数据流网络处理器体系结构-DynaNP。DynaNP利用处理引擎(PE)内控制流执行方式获得较高的可编程性,还利用PE间数据流执行方式开发了报文处理中的任务级并行性。为了进一步提高DynaNP的系统流量,面向DynaNP的多核及数据流特性,设计了混合定制硬件加速机制,并详细介绍了实现混合定制硬件加速的关键技术,通过提供统一的混合定制硬件加速接口,可以支持定制指令和协处理器两种典型硬件加速器。

Aimed at the limitation of ILP exploitation and the fixed topology of control-flow NP, a novel scheme of coarse-grained dataflow NP architecture-DynaNP is presented in this paper. DynaNP not only improves the programmability of the NP by the control-flow structure of Processing Elements （PEs）, but also effectively exploits the task-level parallelism by introducing a data-flow model into the packet processing. Moreover,to further improve the system throughput of DynaNP, a mechanism of hybrid custom hardware acceleration is proposed taking consideration of the multi-core and dataflow characteristics of DynaNP. Moreover, some key techniques of implementing the hybrid custom hardware accelerating unit are also addressed. The mechanism provides a unified interface for two kinds of hardware acceleration of custom instructions and coprocessors.