期刊文献+

SMS4密码算法的低功耗实现 被引量:1

Low Consumption Implementation of SMS4 Cipher Algorithm
下载PDF
导出
摘要 根据实际应用场景,提出一种SMS4密码算法的低功耗实现方法。通过对前后分组加解密数据的密钥进行对比分析,有选择地对上一次操作结果进行复用,同时辅以动态时钟管理、操作数隔离、门控时钟等低功耗设计技术降低功耗。实验结果表明,该实现方法比原算法降低65%的功耗,等效门数减少13%。 Combined with the characteristic and practical working condition of SMS4 cipher algorithm,this paper proposes its low consumption implementation method.By comparative analyzing the secret keys of the front and back grouping encryption deciphering data,selectively reuse the previously generated intermediate data.Combined with dynamic clock switching,operator isolation,gated clock as well as other lower consumption design technic,the power consumption is greatly reduced.Experimental result shows that,this implementation method compared with the original algorithm,the consumption reduces by 65%,and equivalent door number reduces by 13%.
出处 《计算机工程》 CAS CSCD 北大核心 2011年第21期94-96,99,共4页 Computer Engineering
关键词 无线局域网 SMS4算法 低功耗 门控时钟 动态时钟管理 Wireless Local Area Network(WLAN) SMS4 algorithm low consumption gated clock dynamic clock management
  • 相关文献

参考文献5

  • 1国家密码管理局、无线局域网产品使用的SMS4密码算法[EB/OLI.(2010—01—06).http://www.OSCCa.gov.cn/UpFile/200621016423197990.pdf.
  • 2周立阳,周玉洁.AES算法的快速低功耗ASIC实现[J].信息安全与通信保密,2007,29(2):160-162. 被引量:1
  • 3Jan M R, Anantha C, Borivoje N. Digital Integrated Circuits[M]. [S. 1.]: Prentice Hall, 2003.
  • 4王延升,刘雷波.SoC设计中的时钟低功耗技术[J].计算机工程,2009,35(24):257-258. 被引量:10
  • 5NIST. Advanced Encryption Standard[EB/OL]. (2010-11-26). http:// csrc.nist.gov/publicatiorts/fips/fips197 /fips-197.pdf.

二级参考文献8

  • 1Keating M, Flynn D, Aiken R, et al. Low Power Methodology Manual for System-on-chip Design[M]. [S.l.]: Springer, 2007.
  • 2Savithri S, Lucie N, Rajendran E et al. A Timing Methodology Considering Within-die Clock Skew Variations[C]//Proc. of 2008 International SoC Conference. California, USA: [s. n.], 2008: 351-356.
  • 3[2]Chandrakasan A P,Brodersen R W.Low power digital CMOS design[M].Boston Kluwer Academic Publishers,1995.
  • 4[3]Mota A,Ferreira N,Oliveira A,et al.Integrating Dynamic Power Management in the Design Flow.In:IFIP TC10 WGI0.5 Tenth International Conference on Very Large Scale Integration,December 1999:1~4.
  • 5[4]Frenkil J.A multilevel approach to lowpower IC design.IEEE Spectrum,1998,35.
  • 6赵杰,李晨,邓玉良,周泽游.低功耗SOC的动态时钟管理[J].微电子学,2007,37(5):735-738. 被引量:3
  • 7钟涛,王豪才.CMOS集成电路的功耗优化和低功耗设计技术[J].微电子学,2000,30(2):106-112. 被引量:22
  • 8甘学温,莫邦燹.低功耗CMOS逻辑电路设计综述[J].微电子学,2000,30(4):263-267. 被引量:13

共引文献9

同被引文献7

引证文献1

二级引证文献2

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部