三维拓扑结构功耗和延时性能比较与评估

Comparison and evaluation for power and delay of three-dimensional topology structure

分析和比较了规则三维拓扑和自定义三维拓扑在功耗和延时性能上的特征,并对片上网络设计中的拓扑结构选择给出建议。根据当前三维拓扑结构设计热点,选择3D-mesh、3D-torus、插入长连线的自定义三维拓扑和多级三维拓扑作为分析对象,在分析四种拓扑结构特点和生成方法的基础上,给出功耗和延时性能评估模型,分别计算和仿真在不同规模和注入率应用下各种拓扑的延时和功耗结果,并进行比较。实验结果表明,插入长连线的三维拓扑适用于对延时要求严格的场合,采用多级网络的拓扑结构在功耗方面的性能超过其他拓扑结构,而规则拓扑在设计难度、延时和功耗方面有较好的折衷性。

The power consumption and delay performance of regular Three-Dimensional（3D） topology and define 3D topology were analyzed and compared.Besides,the proposal for topology structure of network on chip design was given.According to current focus of 3D topology design,3D-Mesh,3D-Torus,custom topology with long-links and network partitioning techniques were selected as analysis objects.By analyzing four topological structures and generation method,the delay and power consumption evaluation models were proposed.The values of delay and power consumption were simulated and calculated under different scale and injection rates.Experimental result showed that topology with long-links was applied to the strict situation to delay,and network partitioning techniques outperformed other topologies in power consumption.The standard topology had better tradeoff in design complexity,delay and power consumption.