基于FPGA的双机热备外设容错系统仿真设计

Design and simulation of dual-unit hot-standby fault-tolerance relay protection system based on FPGA

针对传统的继电保护冗余系统缺乏对敏感外设容错处理、切换速度慢等问题,提出了基于FPGA的双机热备外设容错系统。该系统由FPGA控制器、DSP控制器、双A/D模块、双继电器模块等外设组成,FPGA控制器完成双机外设模块的故障检测、双机实时切换,为DSP控制器提供A/D实时采样数据、继电器信号接口,DSP控制器对采样数据进行计算与分析,产生继电保护信号,FPGA控制器和DSP控制器通过"心跳"信号互相检测。FPGA控制器时序仿真波形表明:双机外设模块可以实现周期故障自检、双机快速切换。

Aimed at the problems of traditional design of relay protection is lack of fault-tolerance process of key peripheral,and switching is slower the dual-unit hot-standby fault-tolerance relay protection system based on FPGA is presented.The system consists of FPGA controller,DSP controller,dual A/D module,dual relay module and so on.FPGA controller achieves fault detection,real-time switching for dual-unit peripheral module,and provides timely A/D sampling data and signal interface of relay for the DSP controller.DSP controller computes and analyzed the sampling data to work out the output signal of relay protection.FPGA and DSP controller detect each other by ＂ heartbeat ＂ signal.The timing simulation waveforms of FPGA show that it can realize periodic self-testing and dual-unit hot-standby high-speed switching for dual peripherals.