摘要
针对SIFT特征提取的硬件实现结构复杂、难以达到实时性的问题,提出一种改进的高斯金字塔构建方法,该方法从构建高斯金字塔的原始意义出发,大幅减少了所需的运算时间和存储单元。同时提出并验证了合适的SIFT参数配置,以及具体的硬件优化和并行实现方案,使整个系统可以在一片单独的FPGA芯片上实现。该系统读入串行像素数据流,输出关键点的特征描述符,并采用256×256的图像对其进行了仿真验证,结果表明完全达到了实时的效果。
To solve the complexity of hardware implementation of SIFT feature detection and hard to achieve a real time action,an advanced method of building Gaussian filter cascade is presented.This method is based on the original purpose of Gaussian filter cascade and greatly reduces the time and memory of computation.Suitable parameters of SIFT are given out and verified,and also,detail of the parallel hardware architecture system is proposed,which can embed whole system on a single chip.This architecture receives a pixel stream as input and produces as output the detected features of key point.The performance of the system is checked up with images of 256*256 pixels and it gives a absolutely real time result.
出处
《计算机工程与设计》
CSCD
北大核心
2011年第12期4115-4118,共4页
Computer Engineering and Design