基于FPGA的数字射频存储器的研究

Research of Digital RF Memory Based on FPGA

在电子对抗技术中,数字射频存储器(DRFM)是其中的核心部分;文中设计中给出了一种基于FPGA控制的数字射频存储器的实现方法,首先通过正交下变频组件将1.8GHz～2.2GHz的射频信号转变为两路正交的中频信号,经过相位量化处理后进行存储;信号还原的过程与之正好相反,由FPGA控制DDS芯片产生30kHz的多普勒频移信号,然后与FPGA产生的两路正交信号进行混频,最后再将信号上变频为1.8GHz～2.2GHz的射频信号后输出;此时的信号已经叠加了多普勒频移信息。

In the electronic warfare technology, the digital radio frequency memory （DRFM） is the core of all the parts. This paper pres ents a digital radio frequency memory based on the control by FPGA. Firstly, the radio-frequency signal is down--converted into two channels quadrature IF signal from the RF signal. And then the IF signal is stored after phase quantization process. The signal restoring process is just the opposite. The doppler shift signal of 80kHz produced DDS chip, controlled by FPGA, is mixed with two quadrature signals generated by FPGA. Finally, the output signal is upconverted to 1. 8GHz-2. 2GHz RF signal. At this point, the RF signal has been superimposed on the doppler frequency shift information.