摘要
根据项目需求,采用Cyclone II系列EP2C8现场可编程逻辑门阵列(FPGA)作为控制核心,对16位高速模数转换芯片ADS8322进行控制,设计了一种基于Verilog硬件描述语言的ADS8322采样控制逻辑电路,该文详细阐明了ADS8322的特点和工作时序,采用有限状态机,实现了控制器电路的时序逻辑。同时给出采样控制电路在Quartus II 9.1软件环境下的功能仿真波形。通过实际电路测试,证明该设计方案简洁、有效、可靠,同时可方便应用于其他类似的高速AD转换控制。
According to the project needs,the Cyclone Ⅱ series EP2C8 field programmable logic gate array(FPGA) is used to control 16bit high-speed analog-to-digital conversion chip ADS8322,we designed a kind of ADS8322 sampling control logic circuit based on Verilog hardware description languages.This paper discuss the characteristics and work timing of ADS8322 in detail,realizing the control logic by finite state machine.It also gives the function simulation waveform of sampling control circuit in Quartus9.1 software environment.Testing this system in practical,it is proved that the method is simple and effective and reliable.It can be used to control High-speed A/D.
出处
《电子质量》
2011年第12期32-34,共3页
Electronics Quality
基金
国家大学生创新计划项目(101048945)