DDR2 SDRAM控制器的数据通道设计

The design of DDR2 SDRAM controller data-path

在DDR2SDRAM控制器的设计中,用户端与DDR2存储器端之间数据通道的设计是提高数据传输率的关键,也是控制器设计中的难点。首先简单介绍了DDR2SDRAM控制器的整体结构,然后分析了DDR2存储器的读写时序过程,并提出了双向数据DQ与同步信号DQS的相位关系要求,最后在阐述了数据通道要求实现的具体功能后直接使用Altera公司提供的IP核设计了1种高速数据通道,并在时序仿真后在硬件平台上通过了验证。

In the design of DDR2 SDRAM controller,the design of the data channel between client and DDR2 memory is the key to improve the data transfer rate,and is the difficulty in the design of controller.Firstly this paper simply introduces the overall structure of the DDR2 SDRAM controller,then analyses the time sequence of DDR2 memory,and put forward the requirements about the two-way data DQ and synchronization signal the phase relationship DQS.Finally after introduce the data channel requested to realize the specific function,directly using the IP core offered by the company of altera design a high-speed data channels,and verified in sequential simulation.