摘要
FIR滤波器在通信、图像处理、模式识别等领域都有着广泛的应用。本文设计了基于乘累加器(Multiply Accumulation,MAC)的有限冲激响应滤波器(Finite Impulse Response Filter),介绍了其优点及详细的设计方法,并给出了基于FPGA的实现流程,最后进行了基于JTAG的硬件协同仿真验证。仿真与实验结果验证了所提出MAC FIR的正确性与有效性。
The FIR filter is widely used in communications,image processing,pattern recognition and other fields.An FIR filter based on MAC was designed.The advantages and detailed design process were described,with the FPGA implementation process proposed.Finally,the hardware co-simulation based on JTAG was carried out.Simulation and experimental results verify the correctness and effectiveness of the proposed MAC FIR.
出处
《山西焦煤科技》
2011年第11期44-46,共3页
Shanxi Coking Coal Science & Technology
关键词
FIR
MAC
FPGA
数字信号处理
FIR(Finite Impulse Response)
MAC(Multiply Accumulation)
FPGA(Field Programmable Gate Array)
DSP(Digital Signal Processing)