超标量DSP的片上调试与实时跟踪支持

On-chip debug and real-time trace support for superscalar DSP

针对嵌入式系统日益严峻的调试挑战,提出并实现了一种基于32 bit超标量DSP内核的片上调试与实时跟踪架构。该架构通过设计专用的跟踪接口与其他硬件资源,并扩展JTAG端口、存储器保护逻辑与流水线控制逻辑,以较低的硬件开销实现对内核的实时运行控制、内部寄存器与存储器的非侵入访问、带复杂触发条件的断点与观察点设置、硬件单步以及程序流的实时跟踪等典型特征的支持,可满足绝大部分嵌入式系统的开发与调试需求。

For the growing debug challenges of embedded systems,this paper presented and implemented an on-chip debug and real-time trace architecture for 32 bit superscalar DSP core.Due to the dedicated trace interface and other hardware resources,the expanded JTAG port,memory protection logic and pipeline control logic,this architecture could support the following typical debug features with low hardware efforts： real-time run control,non-incursive access of internal registers and local memories,complex hardware breakpoints and watchpoints,hardware single-stepping,and real-time program trace.Consequently,this on-chip debug and real-time trace architecture can meet the development and debugging need for most embedded systems.